The open source toolchain for FPGA’s (icestorm) has stimulated some interesting growth, for what you could be forgiven for considering an area of electronics in danger of stagnation… The comparative ease of MyHDL lead me to somewhat of an epiphany, there used to be only two choices of languages (Verilog and VHDL) both of which frankly make ALGOL look like a modern easy to use language. This has been a very good for elitists who have been able to gouge their clients because of the lack of accessibility to the skills required for hardware design, while looking down their noses at any hobbyist having the temerity to learn FPGA programming.
My previous exposure to FPGA’s had been the Papillio Pro, while this is a nice board it suffers from one major flaw (other than the SDRAM!) – namely the propitiatory tools they had no option than to use. I can’t remember exactly the download size but it was at least 6GB, I mean really Xilinx what. are. you. thinking. It’s a beast, unwieldy with a morass of options hidden within its many menus and popup forms, worse still its slow, it makes learning an archaic language a much, much more tiresome experience to say the least.
As I was learning FPGA’s as a hobby and it wasn’t fun (to say the least) I got as far as a VGA patten generator and a slightly broken character generator, when to be honest I lost interest. Contrast this with my experiences of the iCE40HX8K board and MyHDL and what a breath of fresh air ! Not only did my first project just work (first time too!), it was easy and fun!
Its especially nice to have a simple toolchain, compiling each tool was as simple as make / make install and joy of all joys, you can use a Makefile or even a simple script to build your projects.
While you don’t have to use MyHDL (which compiles down to verilog or even VHDL) its certainly worth looking at, why should python make such a difference? People are very quick to state that hardware design is nothing like programming that is somewhat disingenuous. While you are absolutely not writing code that runs on the FPGA (you can always implement a CPU on the FPGA 😉 ) what you are very much doing is writing a program that describes the behaviour you are looking for. Its important without doubt that you understand timings and that there is no linear flow, often you are writing code that describes what happens next clock cycle after specific conditions are met. Its certainly not mysterious and many concepts (like for example) state machines you’ll have encountered before, the rest as they say are just details ! When learning these new design skills the last thing you want is a fight on your hands because of very literal and pedantic grammar or some other foible of an out of date language, while the author of MyHDL is modest enough to say its nothing revolutionary, there are no two ways about it python had opened up the world of FPGA’s and its blowing some dusty cobwebs away!
There are still a plenty more learning I need to do with MyHDL but I’ll more than likely be making future posts about MyHDL, especially given the ease use…